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| ?2013-2015 cymbet corporation ? tel: +1-763-633-1780 ? www.cymbet.com ds-72-31 v.13 page 1 of 14 spi real-time clock/calendar with integrated backup power cbc34123 enerchip? rtc features ? integrated rechargeable solid state battery with power-fail detect and automatic switchover, pro- viding greater than 30 hours of rtc backup ? smallest commercially available rtc with inte - grated backup power in compact 5mm x 5mm 1.4mm qfn package ? temperature compensated charge control ? integrated enerchip? recharged at vdd > 2.5v ? smt assembly - lead-free refow solder tolerant ? real time clock provides year, month, day, week - day, hours, minutes, and seconds based on a 32.768 khz quartz crystal ? resolution: seconds to years ? watchdog functionality ? freely programmable timer and alarm with inter - rupt capability ? 3-line spi-bus with separate, but combinable data input and output ? integrated oscillator load capacitors for c l = 7 pf ? internal power-on reset (por) ? open-drain interrupt and clock output pins ? programmable offset register for frequency adjustment ? eco-friendly, rohs compliant - tested general description the enerchip rtc cbc34123-m5c combines a real-time clock (rtc) and calendar optimized for low power applications with an integrated rechargeable solid state backup battery and all power management functions. the enerchip rtc ensures a seamless transition from main power to backup power in the event of power loss. the integrated power management circuit ensures thousands of charge-discharge cycles from the integrated enerchip and manages battery charging, discharge cutoff, power switchover, and temperature compensation to maximize the service life of the device. the cbc34123 provides greater than 30 hours of backup time in the event main power is interrupted. typical blackout times are less than 4 hours. longer backup time can be achieved by adding an external enerchip to the vchg pin. the enerchip has extremely low self-discharge, recharges quickly, is non-fammable, and rohs-compliant. the enerchip is charged automatically anytime vdd is above 2.5v. data is transferred serially via a serial peripheral interface (spi-bus) with a maximum data rate of 6.25 mbit/s. alarm and timer functions provide the option to generate a wake-up signal on an interrupt pin. an offset register allows fne tuning of the clock. 5mm x 5mm x 1.4mm 16-qfn package applications ? wireless sensors and rfid tags and other powered, low duty cycle applications. ? power bridging to provide uninterruptible rtc function during exchange of main batteries. ? consumer appliances that have real-time clocks; provides switchover power from main supply to backup battery. ? business and industrial systems such as: network routers, point-of-sale terminals, single- board computers, test equipment, multi-function printers, industrial controllers, and utility meters. ? time keeping application ? battery powered devices ? metering ? high duration timers ? daily alarms ? low standby power applications preliminary figure 1: cbc34123 pin-out diagram
?2013-2015 cymbet corporation ? tel: +1-763-633-1780 ? www.cymbet.com ds-72-31 v.13 page 2 of 14 figure 3: internal schematic of cbc34123 enerchip rtc figure 2: cbc34123 block diagram with registers timer function timer _ clkout 0 eh offset function offset _ register 0 dh countdown _ timer 0 fh control control _ 1 00 h control _ 2 01 h time seconds 02 h minutes 03 h hours 04 h days 05 h weekdays 06 h months 07 h 08 h alarm function minute _ alarm 09 h hour _ alarm 0 ah day _ alarm 0 bh weekday _ alarm 0 ch spi interface watch dog oscillator 32 . 768 khz monitor divider clockout interrupt ce scl sdi sdo osci osco poweron reset int clkoe clkout vdd vss test enerchip and charger en reset vec vchg 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 cbc34123 enerchip? rtc preliminary ?2013-2015 cymbet corporation ? tel: +1-763-633-1780 ? www.cymbet.com ds-72-31 v.13 page 3 of 14 pin number label description 1 osco oscillator output; high-impedance node; minimize wire length between quartz and package 2 test test pin; not user accessible; connect to vss or leave foating (internally pulled down) 3 int/ interrupt output (open-drain; active low) 4 ce chip enable input (active high) with internal pull down 5 vss ground 6 vchg 4.1v (typical) charging source - connect to vec and/or optional enerchip(s) for extended backup time 7 vec positive terminal of integrated thin flm battery - connect only to vchg via pcb trace 8 sdo serial data output, push-pull; high-impedance when not driving; can be con - nected to sdi for single wire data line 9 sdi serial data input; may foat when ce is inactive 10 scl serial clock input; may foat when ce is inactive 11 clkoe clkout enable or disable pin; enable is active high; connect to vss for low power operation 12 clkout clock output (open-drain) 13 vdd supply voltage; positive or negative steps in vdd can affect oscillator perfor - mance; recommend 100nf decoupling close to the device 14 reset/ output signal indicating rtc is operating in backup power mode 15 en charge pump enable; activates vchg 4.1v (typ.) charging source 16 osci oscillator input; high-impedance node; minimize wire length between quartz and package cbc34123 input/output descriptions figure 4: cbc34123 package (left: top view, looking through package; right: pad dimensions) enerchip properties energy capacity (typical): 5ah recharge time to 80%: 10 minutes charge/discharge cycles: >5000 to 10% depth-of-discharge operating temperature: -30c to +70c storage temperature: -40c to +125c minimum vdd to charge enerchip: 2.5v package dimensions (mm) cbc34123 enerchip? rtc preliminary ?2013-2015 cymbet corporation ? tel: +1-763-633-1780 ? www.cymbet.com ds-72-31 v.13 page 4 of 14 absolute maximum ratings parameter condition min typical max units self-discharge (5 yr. average) non-recoverable - 2.5 - % per year recoverable - 1.5 (1) - % per year operating temperature - -30 25 +70 c storage temperature - -40 - +125 (2) c recharge cycles (to 80% of rated capacity) 25c 10% depth-of-discharge 5000 - - cycles 50% depth-of discharge 1000 - - cycles 40c 10% depth-of-discharge 2500 - - cycles 50% depth-of-discharge 500 - - cycles recharge time (to 80% of rated capacity; 4.1v charge; 25c) (3) charge cycle 2 - 11 22 minutes charge cycle 1000 - 45 70 capacity (see figure 5) 40na discharge; 25c 5 - - ah (1) first month recoverable self-discharge is 5% average. (2) storage temperature is for uncharged enerchip cc device. (3) enerchip charging time increases approximately 2x per 10c decrease in temperature. note: all specifcations contained within this document are subject to change without notice. parameter / pin condition min typical max units v dd with respect to gnd 25c gnd - 0.3 - 6.0 v enable input voltage 25c gnd - 0.3 - v dd +0.3 v v ec (1) 25c 3.0 - 4.15 v v chg (1) 25c 3.0 - 4.15 v reset output voltage 25c gnd - 0.3 - 2.7 v int/, ce, test, osci, osco, sdo, sdi, scl, clkoe, clkout see nxp pcf2123 data sheet integrated enerchip thin film battery operating characteristics (1) no external connections to these pins are allowed, except parallel enerchips for extended backup time. figure 5 typical discharge characteristics of the cc005 enerchip ithin the cc12 cbc34123 enerchip? rtc preliminary ?2013-2015 cymbet corporation ? tel: +1-763-633-1780 ? www.cymbet.com ds-72-31 v.13 page 5 of 14 power supply current characteristics of integrated cbc910 power management circuit only t a = -20 oc to +70oc characteristic symbol condition min max units quiescent current (cbc910 power management circuit only; v dd > v reset ; rtc current not included) i q enable=gnd v dd =3.3v - 3.5 a v dd =5.5v - 6.0 a enable=v dd v dd =3.3v - 35 a v dd =5.5v - 38 a enerchip cutoff current (i qbaton adds to rtc current when in backup mode) i qbatoff v bat < v batco , v out =0 - 0.5 na i qbaton v bat > v batco , i out =0 - 42 na interface logic signal characteristics v dd = 2.5v to 5.5v, t a = -20 oc to +70oc characteristic symbol condition min max units high level input voltage v ih - v dd - 0.5 - volts low level input voltage v il - - 0.5 volts high level output voltage v oh v dd >v th (see figures 4 and 5) i l =10a v dd - 0.04v (1) - volts low level output voltage v ol i l = -100a - 0.3 volts logic input leakage current i in 0 ?2013-2015 cymbet corporation ? tel: +1-763-633-1780 ? www.cymbet.com ds-72-31 v.13 page 7 of 14 functional description of integrated cbc34123 real-time clock the cbc34123 contains 16 8-bit registers with an auto-incrementing address counter, an on-chip 32.768 khz oscillator with two integrated load capacitors, a frequency divider which provides the source clock for the real time clock (rtc), a programmable clock output, and a 6.25 mbit/s spi-bus. an offset register allows fne tuning of the clock. all 16 registers are designed as addressable 8-bit parallel registers although not all bits are implemented. ? the frst two registers (memory address 00h and 01h) are used as control registers. ? the memory addresses 02h through 08h are used as counters for the clock function (seconds up to years). the registers seconds, minutes, hours, days, weekdays, months, and years are all coded in binary coded decimal (bcd) format. when one of the rtc registers is written or read the contents of all counters are frozen. therefore, faulty writing or reading of the clock and calendar during a carry condition is prevented. ? addresses 09h through 0ch defne the alarm condition. ? address 0dh defnes the offset calibration. ? address 0eh defnes the clock out and timer mode. ? address registers 0eh and 0fh are used for the countdown timer function. the countdown timer has four selectable source clocks allowing for countdown periods in the range from 244 ms up to four hours. there are also two pre-defned timers which can be used to generate an interrupt once per second or once per minute. these are defned in register control_2 (01h). low power operation minimum power operation will be achieved by reducing the number and frequency of switching signals inside the ic, i.e., low frequency timer clocks and a low frequency clkout will result in lower operating power. a second prime consideration is the series resistance r s of the quartz used. power consumption with respect to quartz series resistance the series resistance acts as a loss element. low r s will reduce current consumption further. important reference documents for complete specifcations of the integrated pcf2123 real-time clock, see here: http://www.cymbet.com/pdfs/nxp rtc pcf2123.pdf for complete specifcations of the cymbet 5 ah enerchip and integrated power management circuit, see here: http://www.cymbet.com/pdfs/ds-72-41.pdf . for guidelines regarding crystal selection and other important information pertaining to the pcf2123, see um10301 - user manual for nxp real time clocks, located here: http://www.nxp.com/documents/user_manual/um10301.pdf cbc34123 enerchip? rtc preliminary ?2013-2015 cymbet corporation ? tel: +1-763-633-1780 ? www.cymbet.com ds-72-31 v.13 page 8 of 14 cbc34123 register overview 16 registers are available. the time registers are encoded in the binary coded decimal (bcd) format to simplify application use. other registers are either bit-wise or standard binary. bit positions labeled as - are not implemented and will return a 0 when read. the bit position labeled as -- is not implemented and will return a 0 or 1 when read. bit positions labeled with n should always be written with logic 0 (1) . address register name bit 7 6 5 4 3 2 1 0 control and status registers 00h control_1 ext_test n stop sr n 12_24 cie n 01h control_2 mi si msf ti_tp af tf aie tie time and date registers 02h seconds os seconds (0 to 59) 03h minutes -- minutes (0 to 59) 04h hours - - ampm hours (1 to 12) in 12 h mode hours (0 to 23) in 24 h mode 05h days - - days (1 to 31) 06h weekdays - - - - - weekdays (0 to 6) 07h months - - - months (1 to 12) 08h years years (0 to 99) alarm registers 09h minute_alarm ae_m minute_alarm (0 to 59) 0ah hour_alarm ae_h - ampm hour_alarm (1 to 12) in 12 h mode hour_alarm (0 to 23) in 24 h mode 0bh day_alarm ae_d - day_alarm (1 to 31) 0ch weekday_alarm ae_w - - - - weekday_alarm (0 to 6) offset register 0dh offset_register mode offset[6:0] timer registers 0eh timer_clkout - cof[2:0] te - ctd[1:0] 0fh countdown_timer countdown_timer[7:0] [1] except in the case of software reset, see section 8.3.1.1. cbc34123 enerchip? rtc preliminary ?2013-2015 cymbet corporation ? tel: +1-763-633-1780 ? www.cymbet.com ds-72-31 v.13 page 9 of 14 typical cbc34123 enerchip rtc connection to microcontroller figure 5 illustrates how the cbc34123 is typically connected to a microcontroller (mcu) in a system. for simplicity, only the mcu lines routed to/from the cbc34123 are shown. the i/o line from the mcu to the en pin of the cbc34123 is optional for reducing power consumption of the cbc34123. the en pin can be forced low by the mcu when the integrated enerchip does not need to be charged. if en is not connected to the mcu or otherwise controlled externally, it must be tied to vdd to ensure the enerchip is charged when vdd is valid. figure 5: typical application schematic showing mcu connections to cbc34123 cbc34123 enerchip? rtc preliminary ?2013-2015 cymbet corporation ? tel: +1-763-633-1780 ? www.cymbet.com ds-72-31 v.13 page 10 of 14 guidelines for handling enerchip rtc devices the enerchip rtc with an integrated thin flm solid state battery features all solid state construction are packaged in standard integrated circuit packages and can be refow soldered for high volume pcb assembly. the cbc34123 enerchip rtc is considered an msl-3 rated device for storage and handling purposes. device handling & storage ? enerchip rtcs are packaged and shipped in tubes or reels in moisture barrier bags, and are sensitive wrprlvwxuhdevruswlrq7khpxvwehnhswlqwkhvhdohgedjxqwlouhdgiruerdugprxqwlqjdqguhr soldering. ? if the enerchip rtcs are removed from the sealed bag more than 168 hours prior to board mounting, wkhpxvwehednhgdwirudplqlpxprikrxuvsulruwrerdugprxqwlqjdqguhrvroghulqj ? store the enerchip rtcs in an environment where the temperature and humidity do not undergo large xfwxdwlrqv6wruhdwwrdqgdwohvvwkdquhodwlyhkxplglw electrostatic discharge (esd) ? the enerchip rtcs are sensitive to esd damage prior to receiving a battery charge cycle. therefore, adherence to esd prevention guidelines is required. ? remove rtc devices from protective shipping and storage containers at approved esd workstations only. ? oohtxlsphqwxvhgwrsurfhvvwkhghylfhvpxvwehfrqjxuhgwrplqlplhwkhjhqhudwlrqrivwdwlf charges. this includes soldering and de-soldering equipment and tools, pick-and-place equipment, test equipment, and all other tools and equipment used to handle or process the devices. ? failure to observe these precautions can lead to premature failure and shall void product warranty. other use guidelines ? do not connect the enerchip rtc to other types of batteries. ? to increase battery life, avoid placing the enerchip rtc near devices that would generate heat exceeding the 70c operating limit. do not hand solder enerchip rtc devices when soldering an individual uncharged enerchip rtc, a qfn capable soldering station with temperature con - trol should be used. it is very important to be able to control the solder temperature and time when soldering an enerchip rtc. enerchip assembly repair techniques for the enerchip rtc qfn package, use a hot air rework station to remove a defective or misplaced enerchip package. if there are other enerchips in the vicinity of the enerchip being replaced, use proper heat shielding to protect the adjacent enerchip package from the heat source and turn off any heat source that would oth - erwise be used to heat the bottom of the board during removal of the enerchip. this will prevent the adjacent enerchip(s) from being damaged during the rework procedure. cbc34123 enerchip? rtc preliminary ?2013-2015 cymbet corporation ? tel: +1-763-633-1780 ? www.cymbet.com ds-72-31 v.13 page 11 of 14 smt process the enerchip rtcs are packaged in standard surface mount packages. refer to the solder paste material data sheets for attachment of the package to a pcb using solder refow processes. ensure that the solder refow oven is programmed to the correct temperature profle prior to assembling the enerchip rtc on the pcb. reflow soldering ? the maximum number of times an uncharged enerchip rtc may be refow soldered is three times. ? the surface temperature of the enerchip rtc package must not exceed 240c. ? the recommended solder refow profle is shown in figure 6 below; refer to the table for time and temperature requirements. whenever possible, use lower temperature solder refow profles. figure 6: enerchip rtc solder refow profle and specifcation table parameter sn/pb pb-free soak temperature, min, tsmin 100c 150c soak temperature, max, tsmax 150c 200c soak time, max, ts 2 min 2 min max ramp-up rate (tl to tp) 3c/sec 3c/sec liquidous temperature, tl 183c 217c time tl maintained above tl 60-150 sec 60-150 sec max peak temperature, tp 220c 240c max time tp at peak temperature tp 20 sec 30 sec max ramp-down rate (tp to tl) 6c/sec 6c/sec time 25c to peak temperature 6 min max 8 min max tp tl cbc34123 enerchip? rtc preliminary ?2013-2015 cymbet corporation ? tel: +1-763-633-1780 ? www.cymbet.com ds-72-31 v.13 page 12 of 14 guidelines for in-circuit testing of the internal enerchip battery it is very important to verify enerchip device connectivity after refow solder process. it is important to read and understand the proper test fow for the enerchip devices. following the proper test method will ensure reworkability of boards. precautions and important processes after assembly on a printed circuit board, the cbc34123 integrated solid state battery is in an uncharged state. it is important that the cbc34123 battery remain untested and uncharged until the last step of an in-circuit system test so that if other components fail test and need to be replaced, the cbc34123 will still be in a refow- solderable state. the crystal and rtc in the cbc34123 can be tested independently from the battery at the same time the other system elements are being tested. there are two considerations when doing post-assembly testing of the users circuit board: 1. when performing circuit testing, short the internal enerchip battery to gnd by forcing the vchg/vec pins to ground potential during testing of the enerchip rtc and other circuit functions. this will prevent the integrated enerchip from accumulating charge while the cbc34123 vdd and en pins are active. 2. when the overall circuit testing is complete, it is permissible to verify connection to the enerchip battery and 4.1v output of the charge pump at the vchg pin by forcing the cbc34123 vdd and en pins high for no more than 3 seconds. activating the charge pump for longer than 3 seconds will put suffcient charge into the enerchip that board level rework is no longer permitted without destroying the enerchip. cbc34123 in-circuit test procedure 1. in order to keep the cbc34123 battery from charging during testing, apply gnd using an in-circuit test bed pin or other shorting method to the vchg and vec pins (6 and 7, respectively) that are normally tied to - gether on the pcb. alternatively, the en pin on the cbc34123 can be forced to a logic low before perform - ing board level testing as this will also prevent charge from accumulating in the battery. warning: if the enable pin is asserted for more than 3 seconds with vdd 2.5 volts, the cbc34123 may not be refowed again. 2. enable power domains under test, with vchg/vec net shorted to gnd or en forced to a logic low level. 3. run all vectors to ensure proper functionality of all semiconductor devices. 4. after all other circuits are functional and boards have been reworked if needed. 5. apply voltage to vin that is in the range of 2.5v to 5.5v. (note: vin = vdd.) 6. verify that the vchg/vec net is 4.1 volts +/- 0.025 volts. 7. allow the battery to charge a very small amount by leaving the device in the above-noted confguration for one second. 8. the chart in figure 7 should be referenced to determine the voltage on the vchg/vec pin to be expected after driving the enable pin high for one second. the decay curves in the chart represent specifc load impedances as might be encountered with automated test equipment (ate). additionally, the decay curves represent the span of enerchip cell impedances as specifed in the respective data sheets. note: if not using ate with the ability to add a load impedance, it will be necessary to add resistance in parallel with the voltage measurement device so the readings will match the graph of figure 7. any measurement equipment and associated impedance circuits must only be temporally tied to the vchg/vec node for the time needed to make the measurement (seconds) and no longer as the measurement impedance will cause the battery to become discharged below 2.5v at which time the cell will become permanently damaged. 9. the graph in figure 7 depicts the time-dependent and temperature-dependent voltage of the enerchip rtc after applying a 4.1vdc charging voltage for approximately one second, followed by a brief discharge at a specifc load resistance. using this graph as a guide, the test engineer can develop a simple test that is feasible with the available test equipment and fxtures and meets the production throughput needs. factory in-circuit enerchip post assembly test steps cbc34123 enerchip? rtc preliminary ?2013-2015 cymbet corporation ? tel: +1-763-633-1780 ? www.cymbet.com ds-72-31 v.13 page 13 of 14 1. the test engineer has the freedom to choose a point on the discharge curve that falls within the parameters of test throughput and equipment measurement capability. in order for the enerchip to be considered as meeting the gross functional test specifcation, the voltage on the vchg/vec pin must be above the value indicated by whichever line is chosen as the reference line. 2. data at two temperatures is shown in order to encompass the range of anticipated factory test foors. note the infuence of temperature on the enerchip test discharge voltage when setting the test specifcation pass/fail limits. figure 7: voltage determination on the vchg/vec pin 2.0 2.5 3.0 3.5 4.0 4.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 enerchip voltage (vdc) charge - discharge time (seconds) enerchip charge - discharge profiles for setting post - assembly test limits 75k ohm load, 20 degrees c 75k ohm load, 30 degrees c 806k ohm load, 30 degrees c 806k ohm load, 20 degrees c cbc34123 internal battery backup verifcation: optional board/system level test. (1) warning: board level refow/rework is not permitted if the following procedure is used. the following test is normally used in the prototype testing phase as this test may take 10-15 minutes to perform which is typically unsuitable for high speed in-circuit testing. 1. power up board or system. 2. ensure that cbc34123 en pin 15 is asserted and vdd is > 2.5 volts. 3. allow battery to charge for several minutes. 4. program device to be battery-backed. 5. remove power for at least several seconds to one minute. 6. power up board or system. 7. read device formerly under battery-backed operation. 8. verify device contents. notes: (1) this test does not verify the actual capacity of the integrated battery. in order to verify actual capacity, the device must be charged for at least one hour and then provide rtc power holdover until battery cut-off occurs. cbc34123 enerchip? rtc preliminary ?2013-2015 cymbet corporation ? tel: +1-763-633-1780 ? www.cymbet.com ds-72-31 v.13 page 14 of 14 cymbet, the cymbet logo, and enerchip are cymbet corporation trademarks disclaimer of warranties; as is the information provided in this data sheet is provided as is and cymbet corporation disclaims all representations or warranties of any kind, express or implied, relating to this data sheet and the cymbet enerchip product described herein, including without limitation, the implied warranties of merchantability, ftness for a particular purpose, non-infringement, title, or any warranties arising out of course of dealing, course of performance, or usage of trade. cymbet enerchip products are not authorized for use in life critical applications. users shall confrm suitability of the cymbet enerchip product in any products or applications in which the cymbet enerchip product is adopted for use and are solely responsible for all legal, regulatory, and safety-related requirements concerning their products and applications and any use of the cymbet enerchip product described herein in any such product or applications. ordering information enerchip cc part number description notes cbc34123-m5c enerchip rtc in 5mm x 5mm x 1.4mm 16-qfn land grid array shipped in tube CBC34123-M5C-TR1 cbc34123-m5c-tr5 enerchip rtc in 5mm x 5mm x 1.4mm 16-qfn land grid array tape-and-reel - 1000 pcs (tr1) or 5000 pcs (tr5) per reel cbc-eval-12 enerchip rtc evaluation kit usb based eval kit with cbc34123 tab board u.s. patent no. 8,144,508. additional u.s. and foreign patents pending cbc34123 packaging enerchip cbc34123 devices are packaging in tubes or reels. the following specifcations are for the 1000 and 5000 part reel packaging confgurations. cbc34123-q5c-tr1 is a 7 inch reel with 1000 parts. cymbet uses the advantek lokreel mini rj7xx packaging reel that has an outside diameter of 7 inches (180mm) and 1/2 inch (13mm) diameter arbor hole. reel hubs measure 2.36 inches (60mm). the 7 inch reel is compliant with eiaj standards for dimension and surface resistivity. cbc34123-q5c-tr5 is a 13 inch reel with 5000 parts. cymbet uses the advantek 13 lokreel packaging reel that has an outside diameter of 13 inches (330mm) and 1/2 inch (13mm) diameter arbor hole. reel hubs measure 4 inches (102mm). the 13 inch reel is compliant with eiaj standards for dimension and surface resistivity. cymbet part package type, # of devices reel size outside diameter - a tape width w, w1 cavity pitch p1 meters per reel pockets/ reel width a0 length b0 depth k0 CBC34123-M5C-TR1 qfn, 1000 180mm 16mm, 8 mm 108 7000 5.45 5.45 1.8 cbc34123-m5c-tr5 qfn, 5000 330mm 16mm, 8mm 540 13000 5.45 5.45 1.8 cbc34123 pin1 location - top side up ? ? ? ? feed direction cbc34123 enerchip? rtc preliminary |
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